型号:
Products & features

■特征
. 10x MMCX连接器
- 8x ADC的输入变压器耦合
- 1x触发输入/输出
- 1X的参考时钟输入/输出
. 单宽度传导冷却FMC
. 兼容FMC规范(VITA 57.1)
. 专为大多数载波卡的电气兼容性设计。
*在订购前确认我们的目标主板

特性
8-Ch, 14-bit, 250MSPS, ADC 板卡
描述

IO Connectors
. 8x MMCX analog inputs
. 1x Trigger input/output [LVTTL, 5V TOL]
- trigger bleeds into channel for latency measurement
- trigger output can be used to initiate an external
event upon data pattern detection
. 1x Reference clock input/output [SINE]
- synchronize multiple boards via a master reference
Clocking
. Clock Generator (Analog Devices: AD9528)
- capable of locking to a reference from the FPGA
carrier card, or free running using the onboard
reference
- generates and returns the necessary clocks to
the FPGA carrier card (drives MGT REFCLK and/or
Global Clock)
- Flexible and programmable SYSREF generation
Performance
. Analog input bandwidth: 4.5 MHz – 500 MHz (-3dB)
. Ch-to-ch crosstalk below -75dB @ TBD MHz
. Onboard clock generator capable of sub-100fs jitter
. Full-scale input programmable 1.383 Vpp – 2.087Vpp
. ADC Multiple Device Synchronization (MDS) for
coherent sampling across all ADC channels
(JESD204B class MCDA-ML)
Power Requirements
. Main rails: 12V and 3.3V
. VADJ: 1.2 to 3.3V (onboard level translators)

模块图
文档下载